The Canada R&D Centre, based in Ottawa, is leading research and development of Telecom Network Infrastructure, in 4G/LTE-A, optical, network processing, and switching/router technology as we continued to promote all-IP transformation for our customers.
In this role, you will be responsible for the functional verification of digital ASICs and providing technical insight and proposals related to system architecture. You will capitalize on your experience developing system/block level verification environments.
Positions will be located in Montreal.
You will participate in all phases of ASIC verification, from the development of verification strategies, environment implementation and coverage closure and communicate with employees at all levels of the organization and across organizational boundaries.
- Experience in all steps of the verification process:
- Writing implementation verification environment architectures
- Development of Testplans
- SystemVerilog environment coding
- Functional coverage coding
- System Verilog and latest verification methodology (VMM, UVM, etc.) a plus
- Assertion based verification experience a plus
- Knowledge and experience with Constrained-Random, Coverage Driven verification methodologies.
- Knowledge and experience with Object-Oriented software design.
- Some experience writing scripts in Perl and/or tcl
- RTL knowledge a plus
- Minimum of 5 years of experience verifying large ASICs
- A University degree in either Electrical Engineering or Computer Science.